Logic Analyzers Explained: See Digital Signals Clearly

A logic analyzer records many digital lines at once and shows each one as a timing waveform. It then decodes those waveforms into readable protocol data. When your I2C sensor returns nothing, your SPI flash reads garbage, or your UART log prints junk, it shows what the wires did in the order they did it. This guide covers how it works, which specs matter, and how to capture and decode a real bus.

Quick Takeaways

• A logic analyzer samples each input as a 0 or 1 against a voltage threshold. An oscilloscope measures analog voltage over time.
• Sample rate must be at least 4x the fastest signal, and 10x is better for clean edges. Memory depth sets how long you can record.
• Protocol decoders for I2C, SPI, UART, and CAN turn raw edges into addresses, bytes, and ACK/NACK flags.
• A $10 USB clone (24 MHz, 8 channels) covers most hobby debugging. Professional work calls for higher sample rates, analog inputs, and input protection.

What a Logic Analyzer Does

A logic analyzer connects to your circuit through probe leads. Each channel acts as a comparator. If the input voltage is above the threshold, it logs a 1. If it is below, it logs a 0. The device stores a stream of these samples in memory, and software draws them as stacked digital waveforms.

That sounds simple, but it solves a hard problem. A microcontroller can change a pin in nanoseconds. A debugger or Serial.print() cannot show you which of eight lines changed first, or by how many microseconds.

Logic Analyzer vs. Oscilloscope

The two tools overlap but answer different questions.

Use a logic analyzer to learn what data moved on a bus. Use an oscilloscope to learn whether the signal is healthy. Many engineers carry both.

How a Logic Analyzer Works

Sampling and the Threshold

The analyzer reads every channel at a fixed sample rate, such as 24 MS/s (24 million samples per second). Each sample compares the pin voltage to a logic threshold. A 3.3V CMOS signal might use a threshold near 1.65V. If your analyzer has a fixed threshold, probing a 1.8V device with it can return all zeros.

Sample Rate and the Nyquist Rule

The sampling theorem says you need more than 2x the signal frequency. That is not enough for digital timing. Sample too slowly and the edges land in the wrong place, and short pulses disappear. Use these working rules:

• 4x the highest toggle rate: the minimum to see edges at all.
• 10x or more: clean edge placement and glitch detection.

A 24 MS/s clone handles UART and I2C easily. It cannot properly capture a 20 MHz SPI bus.

Memory Depth and Capture Time

Capture time equals memory depth divided by sample rate. A buffer of 10 M samples at 10 MS/s records 1 second. At 100 MS/s the same buffer records only 100 ms. Many USB analyzers stream to your PC instead of using onboard memory, so your computer’s RAM becomes the limit.

Triggering

A trigger tells the analyzer when to start saving data. Without one, you capture a random slice of the bus. Common trigger types:

• Edge trigger: fires on a rising or falling edge of one line.
• Pattern trigger: fires when several lines match a state, such as CS low and MOSI high.
• Protocol trigger: fires on an event like an I2C NACK.
• Pulse-width trigger: fires on a pulse shorter or longer than a set value. It finds glitches.

Types of Logic Analyzers

Check specs before you buy. Specs vary by model and revision, so confirm the numbers on the vendor’s datasheet.

What to Check Before Buying

• Voltage range: Many clones expect 3.3V–5V only. Modern 1.8V parts need an analyzer with an adjustable threshold.
• Bandwidth: Analog bandwidth must exceed your sample rate’s useful range, or fast edges get smeared.
• Software: Good decoders and exports save hours.
• Channel count: 8 channels covers most embedded work. A full SPI bus plus an interrupt line and reset is already 6.

Pinout and Probe Connection

Wiring a logic analyzer correctly matters as much as the settings.

1. Connect GND first. Clip the analyzer’s GND lead to your circuit’s ground. Without a shared ground, you get random noise.
2. Attach one channel per signal. Label them in software: D0 = SDA, D1 = SCL.
3. Keep leads short. Long ground leads add inductance and cause false edges at high speed.
4. Match the logic level. Confirm the target runs at 3.3V or 5V and the analyzer accepts it.
5. Never probe mains-referenced circuits with a USB analyzer. A ground fault can damage your PC.

Decoding Common Protocols

Protocol decoders turn waveforms into data. Here is what each one needs.

I2C

I2C is a two-wire, open-drain bus. Devices pull the line low, and pull-up resistors (commonly 4.7 kΩ) bring it high. Standard mode runs at 100 kHz and Fast Mode at 400 kHz. Each transaction starts with a START condition, then a 7-bit address and a R/W bit. The receiver answers with an ACK (SDA low) or NACK (SDA high). A NACK on the address byte means the device is missing, miswired, or at a different address.

SPI

SPI uses a clock, two data lines, and a chip select. Mode depends on CPOL (clock idle level) and CPHA (which edge samples data). A wrong mode shifts every bit and returns garbage. Try modes 0–3 in the decoder until the bytes match your datasheet.

UART

UART has no clock, so the decoder needs the right baud rate. A wrong rate produces framing errors and nonsense characters. Most devices use 8N1: 8 data bits, no parity, 1 stop bit.

Firmware: A Test Signal to Capture

Use this ESP32 sketch to read the BME280 chip ID over I2C. The register 0xD0 should return 0x60. Probe GPIO21 (SDA) and GPIO22 (SCL).

#include <Wire.h>

#define BME280_ADDR   0x76   // SDO pin to GND = 0x76, SDO to VCC = 0x77
#define REG_CHIP_ID   0xD0   // Chip ID register, expected value 0x60

void setup() {
  Serial.begin(115200);
  Wire.begin(21, 22);        // SDA = GPIO21, SCL = GPIO22 on most ESP32 boards
  Wire.setClock(100000);     // 100 kHz standard mode, easy to capture
}

void loop() {
  Wire.beginTransmission(BME280_ADDR);
  Wire.write(REG_CHIP_ID);                 // Point to the chip ID register
  uint8_t err = Wire.endTransmission(false); // Repeated START, no STOP

  if (err == 0) {
    Wire.requestFrom(BME280_ADDR, (uint8_t)1); // Read one byte back
    uint8_t id = Wire.read();
    Serial.printf("Chip ID: 0x%02X\n", id);    // Expect 0x60 for BME280
  } else {
    Serial.printf("I2C error: %d\n", err);     // 2 = address NACK
  }
  delay(1000);                                 // One transaction per second
}

On the analyzer you should see a START, address 0x76 with the write bit (shown as 0xEC), an ACK, the byte 0xD0, a repeated START, address with the read bit (0xED), an ACK, then 0x60 and a NACK from the controller.

Real-World Project: Debug a Silent I2C Sensor

Your sensor returns no data and the sketch prints I2C error: 2. Follow this workflow.

Step 1: Wire the Analyzer

Connect GND to the ESP32 GND. Connect D0 to GPIO21 (SDA) and D1 to GPIO22 (SCL).

Step 2: Configure the Capture

Set the sample rate to 8 MS/s, which is 20x the 400 kHz maximum. Choose a threshold for 3.3V logic. Set a falling-edge trigger on D0, because I2C always starts with SDA falling while SCL is high.

Step 3: Add the Decoder

Open the analyzers panel and add I2C. Assign D0 to SDA and D1 to SCL.

Step 4: Capture and Read

Run the sketch and press record. You will see one of three results:

If the chip ID is correct but the data is wrong, the fault is in your software, not your wiring.

Step 5: Log It from the Command Line (Optional)

With sigrok you can capture without a GUI. This example uses an FX2LP-based analyzer:

# Capture 200k samples at 2 MS/s and decode I2C on channels D0 (SDA) and D1 (SCL)
sigrok-cli -d fx2lafw --config samplerate=2m --samples 200k \
  -P i2c:scl=D1:sda=D0

Troubleshooting a Bad Capture

To compute baud rate from a captured waveform, measure the shortest pulse width. For a pulse of 8.68 µs, baud rate is 1 / 8.68 µs, which is about 115,200.

Logic Analyzer Tips from the Bench

• Name every channel before you capture. Unlabeled traces waste time later.
• Save the session file with decoders configured so you can compare a good capture with a bad one.
• Trigger on the failure, not the start. Use a NACK or error condition and let the buffer wrap.
• Add a debug GPIO in firmware. Toggle a spare pin at the start of a function and probe it next to the bus. You get exact execution timing.
• Pair it with a scope when the decoder looks right but the device misbehaves. Slow edges and ringing hide from digital analysis.

FAQ

What is a logic analyzer used for?

A logic analyzer captures and displays digital signals over time. Engineers use it to debug I2C, SPI, UART, and CAN buses, check microcontroller timing, and find protocol errors that a serial monitor cannot show.

What is the difference between a logic analyzer and an oscilloscope?

A logic analyzer reads many channels as simple 0 or 1 states and decodes protocols. An oscilloscope measures the actual analog voltage on a few channels, so it shows noise, ringing, and rise time. Logic analyzers show what data moved, and oscilloscopes show how healthy the signal is.

What sample rate do I need for a logic analyzer?

Sample at least 4x the fastest signal frequency, and aim for 10x for accurate edges. A 24 MS/s analyzer handles UART and I2C well, but an 8 MHz SPI bus needs about 80 MS/s.

Are cheap logic analyzers worth it?

Yes, for hobby work. A $10 clone with 8 channels and 24 MS/s runs well with free sigrok/PulseView software. It lacks input protection and high-speed capture, so move up to a better model for 1.8V logic, fast SPI, or daily professional use.