You can design a manufacturable circuit board without paying for software. KiCad 10 is a free, open-source EDA suite that covers schematic capture, PCB layout, 3D preview, and fabrication output in one project. This guide walks you through a complete first board: an ATtiny85 LED blinker with a power input, a decoupling capacitor, and a programming header. You will go from a blank project to a zipped Gerber package a fab house can build.
Version note: The workflow below uses the core KiCad 8/9/10 architecture, which has stayed stable across releases. Menu labels and some dialog layouts may shift slightly in KiCad 10. Check the official release notes for UI changes before you start.
Quick Takeaways
- KiCad has six core tools: Project Manager, Schematic Editor, Symbol Editor, PCB Editor, Footprint Editor, and Gerber Viewer.
- The workflow is fixed: schematic → ERC → footprint assignment → PCB layout → DRC → Gerbers.
- A two-layer board with 0.2 mm minimum trace width and 0.2 mm clearance is accepted by nearly every low-cost fab.
- Always run ERC (Electrical Rules Check) and DRC (Design Rules Check) before exporting. They catch most beginner errors.
| Stage | Tool | Output |
|---|---|---|
| Capture circuit | Schematic Editor (Eeschema) | .kicad_sch |
| Check logic | ERC | Error report |
| Assign footprints | Footprint Assignment | Symbol-to-footprint map |
| Lay out board | PCB Editor | .kicad_pcb |
| Check geometry | DRC | Error report |
| Manufacture | Plot / Drill dialogs | Gerber + drill files |
What You Need Before You Start
Install KiCad from the official site at kicad.org. The installer bundles the default symbol libraries, footprint libraries, and 3D models. Use a mouse with a scroll wheel. PCB routing on a trackpad is slow and error-prone.
Your design for this guide:
- U1: ATtiny85 microcontroller, SOIC-8 package
- D1: LED, 0805
- R1: 330 Ω current-limiting resistor, 0805
- C1: 100 nF decoupling capacitor, 0805
- J1: 2-pin power header, 2.54 mm pitch
- J2: 2×3 ISP programming header, 2.54 mm pitch
Supply voltage is 5V. With a typical red LED forward voltage of about 2V, the 330 Ω resistor limits current to roughly 9mA, safely under the ATtiny85’s 40mA per-pin absolute maximum.
Step 1: Create the Project
Open KiCad and choose File → New Project. Name it attiny_blinker. Leave “Create a new folder for the project” checked.
KiCad generates three files:
attiny_blinker.kicad_pro— project settingsattiny_blinker.kicad_sch— schematicattiny_blinker.kicad_pcb— board layout
Keep every file for a project in one folder. Moving files individually breaks library references.
Step 2: Draw the Schematic
Double-click the .kicad_sch file to open the Schematic Editor.
Place Components
Press A to open the symbol chooser. Search and place each part:
| Reference | Search Term | Library Symbol |
|---|---|---|
| U1 | ATtiny85-20S |
MCU_Microchip_ATtiny |
| R1 | R |
Device:R |
| C1 | C |
Device:C |
| D1 | LED |
Device:LED |
| J1 | Conn_01x02 |
Connector_Generic |
| J2 | AVR-ISP-6 |
Connector |
Press R to rotate a selected part. Press M to move it. Press C to copy.
Add Power Symbols
Press P and add a VCC (or +5V) symbol and a GND symbol. Power symbols create global nets. Every pin tied to GND connects automatically across the sheet.
Wire the Circuit
Press W to start a wire. Click a pin, then click the destination pin. Make these connections:
| From | To |
|---|---|
| J1 pin 1 | +5V |
| J1 pin 2 | GND |
| U1 VCC (pin 8) | +5V |
| U1 GND (pin 4) | GND |
| C1 pin 1 | +5V |
| C1 pin 2 | GND |
| U1 PB0 (pin 5) | R1 pin 1 |
| R1 pin 2 | D1 anode |
| D1 cathode | GND |
| U1 PB0/MOSI (pin 5) | J2 pin 4 |
| U1 PB1/MISO (pin 6) | J2 pin 1 |
| U1 PB2/SCK (pin 7) | J2 pin 3 |
| U1 PB5/RESET (pin 1) | J2 pin 5 |
| J2 pin 2 | +5V |
| J2 pin 6 | GND |
Notice that PB0 drives both the LED and the MOSI line of the programming header. This is a common shortcut on small AVR boards, and the LED will flicker during programming. If that bothers you, move the LED to PB3 (pin 2) instead and update the firmware pin number below.
Handle Unused Pins
Press Q to place a no-connect flag on every unused pin. This silences ERC warnings and documents your intent.
Annotate and Run ERC
Click Tools → Annotate Schematic to assign reference designators automatically. Then click Inspect → Electrical Rules Checker and press Run ERC.
Common beginner errors:
- Pin not connected: place a wire or no-connect flag.
- Power pin not driven: add a PWR_FLAG symbol to the
+5VandGNDnets. KiCad needs to know where power originates. - Pin conflicts: two output pins tied together. Re-check your wiring.
Fix every error. Review warnings individually rather than ignoring them.
Step 3: Assign Footprints
A symbol is a logical representation. A footprint is the physical copper pattern that holds the part. Open Tools → Assign Footprints.
| Reference | Footprint |
|---|---|
| U1 | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm |
| R1 | Resistor_SMD:R_0805_2012Metric |
| C1 | Capacitor_SMD:C_0805_2012Metric |
| D1 | LED_SMD:LED_0805_2012Metric |
| J1 | Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical |
| J2 | Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Vertical |
Always verify footprints against the manufacturer datasheet. A wrong pad pitch means a dead board. SOIC-8 body width differs between the 150 mil (3.9 mm) and 208 mil (5.3 mm) variants, so confirm your exact part number.
Save the schematic with Ctrl+S.
Step 4: Set Up the PCB Editor
Click Tools → Update PCB from Schematic (or press F8) in the Schematic Editor. The PCB Editor opens with all footprints piled together and thin white ratsnest lines showing required connections.
Define Board Setup
Open File → Board Setup and configure:
| Setting | Value | Reason |
|---|---|---|
| Copper layers | 2 | Cheapest, sufficient here |
| Min track width | 0.2 mm | Safe for budget fabs |
| Min clearance | 0.2 mm | Safe for budget fabs |
| Min via diameter | 0.6 mm | Standard budget spec |
| Min via drill | 0.3 mm | Standard budget spec |
| Default track width (Net Classes) | 0.25 mm | Signal traces |
| Power track width | 0.5 mm | Handles higher current |
Check your chosen manufacturer’s capability page. Fab specs vary, and tighter limits cost more.
Draw the Board Outline
Select the Edge.Cuts layer from the layer panel. Use Draw a Rectangle and create a 30 mm x 20 mm outline. Edge.Cuts must form a closed shape. An open outline causes fab rejection.
Step 5: Place Components
Press M over a footprint to move it. Group related parts:
- Put C1 within 3 mm of U1 pins 8 and 4. Short decoupling paths reduce power-rail noise.
- Place J1 at one board edge for easy power access.
- Place J2 at the opposite edge for programming access.
- Keep R1 and D1 near U1 pin 5.
Press F to flip a part to the back side if needed. Keep all parts on the top layer for your first board, since single-sided assembly is simpler.
Use the ratsnest lines as a guide. Shorter, less-crossed ratsnest lines mean easier routing.
Step 6: Route the Traces
Press X over a pad to start a trace. Click to anchor corners. Click the destination pad to finish.
Routing Rules for Beginners
- Use 45-degree corners, not 90-degree bends.
- Route power and ground with wider traces (0.5 mm).
- Route signal traces at 0.25 mm.
- Press V to place a via and switch layers mid-route.
- Keep traces away from the board edge by at least 0.3 mm.
Add a Ground Pour
Select the B.Cu layer. Click Add Filled Zone (Ctrl+Shift+Z), draw around the board outline, and assign the GND net. Press B to refill zones.
A ground plane lowers loop inductance, improves noise immunity, and reduces the amount of routing you need to do by hand. Add one to the F.Cu layer as well if space allows, and stitch the two with a few GND vias.
Step 7: Run DRC
Open Inspect → Design Rules Checker and click Run DRC. Enable the options to check for unconnected items and footprint errors.
| DRC Error | Meaning | Fix |
|---|---|---|
| Clearance violation | Copper too close | Move trace or reduce width |
| Unconnected items | Ratsnest line not routed | Finish the trace |
| Silk over copper | Text overlaps pad | Move the reference label |
| Track width too small | Below the board minimum | Widen the trace |
| Hole clearance | Drill too close to copper | Move via |
Reach zero errors before continuing. Review warnings individually. Some, like silkscreen overlap, are cosmetic.
Step 8: Inspect in 3D
Press Alt+3 to open the 3D Viewer. Rotate the board and check:
- Components sit in the correct orientation
- The SOIC-8 pin 1 marker matches your schematic
- Header pins face the right direction
- No parts overlap or float off the board
This visual check catches mirrored footprints and rotated polarized parts before you spend money on fabrication.
Step 9: Export Gerber Files
Open File → Fabrication Outputs → Gerbers (.gbr). Create an output folder named gerbers inside the project directory.
Select these layers:
| Layer | File Purpose |
|---|---|
| F.Cu | Top copper |
| B.Cu | Bottom copper |
| F.Paste | Stencil (SMD assembly) |
| F.Silkscreen | Top labels |
| F.Mask | Top solder mask |
| B.Mask | Bottom solder mask |
| Edge.Cuts | Board outline |
Click Plot. Then click Generate Drill Files and choose Excellon format with Decimal precision. Click Generate Drill File.
Verify the output:
- Open Gerbview from the KiCad Project Manager.
- Load all
.gbrand.drlfiles. - Toggle layers. Confirm the outline, copper, and drills align.
Zip the gerbers folder. Upload the .zip to your chosen fabricator’s quote page.
Step 10: Upload Firmware
Once the board arrives and you have soldered the parts, program the ATtiny85 with an AVR ISP programmer (USBasp or similar). This blink sketch uses PB0, which is pin 5 on the chip:
// ATtiny85 LED blink - direct port register control
// Target: 1 MHz internal oscillator (factory default)
// LED on PB0 (physical pin 5)
#include <avr/io.h>
#include <util/delay.h>
#ifndef F_CPU
#define F_CPU 1000000UL // 1 MHz internal RC oscillator
#endif
int main(void) {
DDRB |= (1 << PB0); // Set PB0 as output via Data Direction Register
while (1) {
PORTB ^= (1 << PB0); // Toggle PB0 using XOR on the port register
_delay_ms(500); // Wait 500 ms (1 Hz blink rate)
}
}
Compile with avr-gcc and flash with avrdude:
# Compile for ATtiny85 at 1 MHz
avr-gcc -mmcu=attiny85 -Os -DF_CPU=1000000UL -o blink.elf blink.c
# Convert ELF to Intel HEX
avr-objcopy -O ihex blink.elf blink.hex
# Flash using a USBasp programmer
avrdude -c usbasp -p t85 -U flash:w:blink.hex
KiCad vs. Other EDA Tools
| Feature | KiCad | Eagle | Altium Designer | EasyEDA |
|---|---|---|---|---|
| Cost | Free | Subscription | High-cost license | Free tier |
| Open source | Yes | No | No | No |
| Offline use | Full | Full | Full | Limited |
| Board size limit | None | Tiered | None | None |
| Learning curve | Moderate | Moderate | Steep | Easy |
| Best for | Hobbyists and pros | Legacy projects | Enterprise teams | Quick prototypes |
Real-World Workflow: Scaling This Board
Once the blinker works, extend the same process to a sensor node.
- Swap the ATtiny85 for an ESP32-C3 module.
- Add a BME280 over I2C (SDA to GPIO8, SCL to GPIO9).
- Add 4.7 kΩ pull-up resistors on both I2C lines.
- Add an AMS1117-3.3 regulator with 10 µF input and output capacitors.
- Add a TVS diode on the power input to clamp voltage spikes.
Keep the antenna area of any ESP32 module free of copper. Follow the manufacturer’s keep-out guidance, because a ground pour under the antenna destroys range.
Common Beginner Mistakes
| Mistake | Consequence | Prevention |
|---|---|---|
| Skipping ERC | Hidden net errors | Run ERC after every edit |
| Wrong footprint | Parts do not fit | Compare against the datasheet |
| Missing decoupling capacitor | Resets and noise | Place 100 nF at every IC |
| Open Edge.Cuts outline | Fab rejects order | Verify the closed shape |
| Mixed units | Wrong dimensions | Pick mm or mil and stay with it |
| Skipping Gerbview | Unseen output errors | Always inspect before ordering |
Frequently Asked Questions
Is KiCad good for beginners?
Yes. KiCad is free, has no board size limits, and offers extensive documentation and tutorials. The learning curve is moderate. Most beginners complete a first board within a weekend.
How do I export Gerber files from KiCad?
Open the PCB Editor, then choose File → Fabrication Outputs → Gerbers. Select your copper, mask, silkscreen, and Edge.Cuts layers, then click Plot. Generate Excellon drill files separately and zip everything together.
What is the difference between ERC and DRC in KiCad?
ERC checks the schematic for logical errors such as unconnected pins and conflicting outputs. DRC checks the PCB layout for physical errors such as clearance violations and unrouted nets. Run both before ordering.
Can I use KiCad for commercial products?
Yes. KiCad is released under the GPL license, which covers the software itself and not the designs you create. You own your designs and can sell products built from them.




