Choosing between a microcontroller (MCU), a microprocessor (MPU), and an FPGA decides your project’s cost, power budget, and development time. An MCU integrates CPU, memory, and peripherals on one chip. An MPU is a bare processing core that needs external RAM and storage. An FPGA is a reconfigurable logic fabric that you wire into custom digital hardware. This guide compares architecture, performance, power, and cost, then walks through a practical build for each.
Quick Takeaways
- Microcontroller: Single-chip computer with on-board Flash, SRAM, and peripherals (GPIO, ADC, I2C, SPI, UART). Best for real-time control, sensors, and low-power IoT.
- Microprocessor: High-performance CPU (often 1 GHz+) that relies on external DDR RAM and storage. Best for running Linux, GUIs, and heavy compute.
- FPGA: Reconfigurable array of LUTs and flip-flops. Executes true parallel logic with nanosecond determinism. Best for high-speed I/O, signal processing, and custom protocols.
- Rule of thumb: Pick an MCU for control, an MPU for software-rich applications, and an FPGA for parallel, timing-critical hardware.
| Feature | Microcontroller | Microprocessor | FPGA |
|---|---|---|---|
| Example | ESP32, STM32F4, ATmega328P | Raspberry Pi 5 (BCM2712), i.MX 8 | Xilinx Artix-7, Lattice iCE40 |
| Typical Clock | 16 MHz – 240 MHz | 1 GHz – 3 GHz | 50 MHz – 500 MHz (user logic) |
| On-chip Memory | Yes (KB–MB) | No (external DDR) | Block RAM only (KB–MB) |
| Execution Model | Sequential | Sequential (multi-core) | True parallel |
| Power | µW – mW | 1 W – 15 W | 0.5 W – 20 W+ |
| Cost | $0.50 – $15 | $15 – $150 | $5 – $500+ |
| Programming | C/C++, MicroPython | C, C++, Python, Linux apps | Verilog, VHDL, HLS |
| Learning Curve | Low | Medium | High |
What Is a Microcontroller?
A microcontroller is a complete computer on a single integrated circuit. It packs a CPU core, Flash program memory, SRAM, timers, and communication peripherals into one package. You power it, flash firmware, and it runs.
Core Architecture
- CPU core: 8-bit (AVR, PIC), 32-bit (ARM Cortex-M0/M3/M4/M7, RISC-V, Xtensa LX6).
- Memory: Flash holds firmware (16 KB – 4 MB typical). SRAM holds variables (2 KB – 512 KB typical).
- Peripherals: ADC (10–16 bit), DAC, PWM timers, UART, SPI, I2C, CAN, USB.
- Clock: Internal RC oscillator or external crystal, typically 8–240 MHz.
Strengths
- Deterministic real-time response with interrupt latency in the low microsecond range.
- Deep sleep currents as low as 1 µA on parts like the STM32L0 and nRF52.
- Low cost and tiny footprint.
- Bare-metal or RTOS (FreeRTOS, Zephyr) operation with no OS overhead.
Limitations
- Limited RAM and Flash.
- No memory management unit (MMU) on most parts, so no full Linux.
- Sequential execution means one core handles tasks through interrupts or scheduling.
What Is a Microprocessor?
A microprocessor is a CPU on a chip without built-in main memory or storage. It needs external DDR SDRAM, eMMC/SD storage, power management ICs, and a board-level design to function. Many modern MPUs are really SoCs (System on Chip) that add a GPU, video engine, and peripherals around the core.
Core Architecture
- CPU: 32/64-bit ARM Cortex-A, x86, or RISC-V application cores, often multi-core.
- MMU: Enables virtual memory and full operating systems like Linux and Android.
- Clock: 1–3 GHz.
- External memory: DDR3/DDR4/LPDDR4 over a high-speed bus. PCB layout requires controlled impedance and length matching.
Strengths
- Massive compute power for computer vision, UI rendering, and networking stacks.
- Access to the full Linux ecosystem (Python, Docker, OpenCV, TensorFlow Lite).
- Gigabytes of RAM.
Limitations
- Non-deterministic timing under a general-purpose OS (jitter in the millisecond range).
- Higher power draw and heat.
- Complex PCB design (multi-layer, DDR routing, power sequencing).
- Slow boot times compared to an MCU.
What Is an FPGA?
An FPGA (Field-Programmable Gate Array) is not a processor. It is a silicon canvas of programmable logic blocks and routing. You describe hardware in Verilog or VHDL, and the toolchain maps it to physical gates.
Core Architecture
- LUTs (Look-Up Tables): Implement any combinational logic function.
- Flip-flops: Store state and enable synchronous design.
- Block RAM (BRAM): Dedicated on-chip memory.
- DSP slices: Hardened multiply-accumulate units for filters and FFTs.
- I/O banks: Support multiple voltage standards (LVCMOS 3.3V, LVDS, SSTL).
- Hard/Soft cores: Some FPGAs embed ARM cores (Xilinx Zynq), or you can instantiate soft CPUs (MicroBlaze, PicoRV32).
Strengths
- True parallelism: Hundreds of operations execute in the same clock cycle.
- Cycle-accurate determinism: Latency is fixed in nanoseconds.
- Custom peripherals and protocols on demand (a 20th UART costs only logic cells).
- Reconfigurable in the field.
Limitations
- Steep learning curve (HDL, timing closure, constraints).
- Longer development and compile cycles (minutes to hours).
- Higher unit cost and power for equivalent simple tasks.
- Requires external configuration memory on SRAM-based devices.
Head-to-Head Comparison
Architecture and Execution
| Aspect | MCU | MPU | FPGA |
|---|---|---|---|
| Design Paradigm | Software on fixed hardware | Software on OS | Hardware description |
| Parallelism | Interrupts, RTOS tasks | Multi-core threads | Native, per-gate |
| Timing Jitter | ~1–10 µs | ~1–10 ms (Linux) | ~0 (clock-cycle exact) |
| Boot Time | < 10 ms | 5–30 s | 50–500 ms (config load) |
| Peripheral Set | Fixed | Fixed + external | Fully custom |
Power and Cost
| Aspect | MCU | MPU | FPGA |
|---|---|---|---|
| Active Power | 10–300 mW | 1–15 W | 0.5–20 W |
| Sleep Power | 1–10 µA | 100 mW+ | 10 mW+ (some 100 µW) |
| Chip Cost | $0.50–$15 | $15–$150 | $5–$500+ |
| BOM Complexity | Very low | High | Medium–High |
| Battery Suitability | Excellent | Poor | Moderate |
Pinout and Interface Snapshot
The same peripheral looks very different across devices.
| Interface | MCU (ESP32) | MPU (Raspberry Pi) | FPGA (iCE40) |
|---|---|---|---|
| I2C | GPIO21 (SDA), GPIO22 (SCL) | GPIO2, GPIO3 | Any pin via soft IP |
| SPI | GPIO23 (MOSI), GPIO19 (MISO), GPIO18 (SCK) | GPIO10/9/11 | Any pin via soft IP |
| UART | GPIO1 (TX), GPIO3 (RX) | GPIO14/15 | Any pin via soft IP |
| Logic Level | 3.3V | 3.3V | 3.3V / 1.2V core |
On an FPGA, pin function is whatever your HDL and constraints file say it is.
Code Examples: Blinking an LED on Each Platform
Microcontroller (Arduino C++ on ESP32)
// Blink an LED on GPIO2 of an ESP32
const int LED_PIN = 2; // Onboard LED on most ESP32 dev boards
void setup() {
pinMode(LED_PIN, OUTPUT); // Configure GPIO2 as push-pull output
}
void loop() {
digitalWrite(LED_PIN, HIGH); // Drive pin to 3.3V
delay(500); // Blocking delay of 500 ms
digitalWrite(LED_PIN, LOW); // Drive pin to 0V
delay(500);
}
Microprocessor (Python on Raspberry Pi)
# Blink an LED on GPIO17 of a Raspberry Pi using gpiozero
from gpiozero import LED
from time import sleep
led = LED(17) # BCM pin 17, wire LED + 330 ohm resistor to GND
while True:
led.on() # Timing is controlled by the Linux scheduler
sleep(0.5) # Not hard real-time; jitter is expected
led.off()
sleep(0.5)
FPGA (Verilog on Lattice iCE40)
// Blink an LED using a 12 MHz clock divider
module blink (
input wire clk, // 12 MHz onboard oscillator
output wire led // Connected to an LED pin
);
reg [23:0] counter = 0; // 24-bit counter: 2^24 / 12 MHz ≈ 1.4 s period
always @(posedge clk) begin
counter <= counter + 1; // Increments every clock edge in hardware
end
assign led = counter[23]; // MSB toggles roughly every 0.7 s
endmodule
The MCU and MPU run instructions one after another. The FPGA example creates a physical counter circuit that ticks on every clock edge, independent of any software.
How to Choose: Decision Guide
| Your Requirement | Best Choice |
|---|---|
| Battery-powered sensor node running for years | MCU |
| Wi-Fi/BLE IoT device with simple logic | MCU (ESP32, nRF52) |
| Motor control with hard real-time loops | MCU (STM32) or FPGA |
| Camera streaming, AI inference, web UI | MPU |
| Running Linux, Docker, databases | MPU |
| High-speed ADC capture (> 100 MSPS) | FPGA |
| Custom protocol or ultra-low-latency trading logic | FPGA |
| Video processing, software-defined radio | FPGA or SoC FPGA (Zynq) |
| Cost-sensitive mass production | MCU |
Hybrid Architectures
Many modern products combine two or more.
- MPU + MCU: A Linux MPU handles the UI and cloud connectivity while an MCU manages real-time motor or sensor control. The Raspberry Pi Pico often fills this co-processor role.
- MCU + FPGA: The MCU runs control firmware while the FPGA handles high-speed data capture.
- SoC FPGA: Chips like the Xilinx Zynq-7000 pair ARM Cortex-A9 cores with FPGA fabric on one die.
Real-World Project Workflows
Project 1: Battery-Powered IoT Weather Station (MCU)
Components: ESP32, BME280 (I2C), 18650 Li-ion cell, TP4056 charger.
- Wire BME280 SDA to GPIO21 and SCL to GPIO22. Power it from 3.3V.
- Read temperature, humidity, and pressure every 10 minutes.
- Publish via MQTT over Wi-Fi.
- Enter deep sleep between readings. Average current drops to roughly 10–20 µA in sleep, extending battery life to months.
#include <Wire.h>
#include <Adafruit_BME280.h>
#define SLEEP_SECONDS 600
Adafruit_BME280 bme;
void setup() {
Wire.begin(21, 22); // SDA = GPIO21, SCL = GPIO22
bme.begin(0x76); // Default I2C address of BME280
float tempC = bme.readTemperature(); // Read temperature in Celsius
// ... publish tempC via MQTT here ...
esp_sleep_enable_timer_wakeup(SLEEP_SECONDS * 1000000ULL); // Wake timer in µs
esp_deep_sleep_start(); // Enter deep sleep, RAM is lost
}
void loop() {} // Never reached
Project 2: Smart Camera Doorbell (MPU)
Components: Raspberry Pi 5, Pi Camera Module, PIR sensor, microSD card.
- Run Raspberry Pi OS and a Python service.
- Trigger on PIR motion at GPIO4.
- Capture video, run OpenCV person detection, and push alerts through a cloud API.
An MCU cannot handle the video pipeline and neural inference here. The MPU’s RAM and Linux ecosystem make it practical.
Project 3: High-Speed Logic Analyzer (FPGA)
Components: Lattice iCE40 HX8K, SRAM, USB bridge (FT2232H).
- Sample 8 digital inputs at 100 MHz into on-chip BRAM.
- Add a trigger comparator in Verilog.
- Stream captured data to a PC over USB.
A microcontroller’s interrupt latency would miss edges at this speed. The FPGA samples every clock cycle with fixed timing.
Common Mistakes to Avoid
- Using an MPU for a simple sensor: Wastes watts and BOM cost.
- Ignoring logic levels: Mixing 5V and 3.3V I/O can destroy GPIO pins. Use a level shifter.
- Expecting hard real-time from Linux: Use an MCU or FPGA for microsecond-accurate control.
- Underestimating FPGA tooling: Budget time for simulation, constraints, and timing analysis.
- Skipping decoupling: Place 100 nF capacitors close to every VCC pin on all three device types.
Frequently Asked Questions
Is a microcontroller better than a microprocessor?
Neither is universally better. A microcontroller is better for low-power, real-time, embedded control with minimal cost. A microprocessor is better for software-heavy tasks that need an operating system, large memory, and high clock speeds.
Can an FPGA replace a microcontroller?
Yes, using a soft-core CPU such as MicroBlaze or PicoRV32 inside the FPGA fabric. This costs more, uses more power, and takes longer to develop. It makes sense only when you also need custom parallel hardware or unusual peripherals.
Is the Raspberry Pi a microcontroller or a microprocessor?
The Raspberry Pi 5 is a single-board computer built on a microprocessor-class SoC (Broadcom BCM2712). The Raspberry Pi Pico uses the RP2040, which is a true microcontroller.
Which is faster: an FPGA or a microprocessor?
It depends on the workload. A microprocessor has a higher clock rate and wins on general sequential code. An FPGA wins on parallel, deterministic tasks such as signal processing, where it completes many operations per clock cycle at fixed latency.




